[PATCH 3/3] libc_elf_mips: specific auxiliary vector handling for MIPS

[Carmelo AMOROSO]

On 5/3/2011 1:42 AM, Kevin Cernekee wrote:
> On Mon, May 2, 2011 at 9:44 AM, Carmelo AMOROSO <carmelo.amoroso at st.com> wrote:
>> Extend aux vect handling for MIPS to retrieve DCache shape information
>> and platform string.
> 
> I had to add a (verbatim) copy of the SH Makefile.arch, for MIPS, in
> order to get the new dl-support.c file added to the build.
> 

yes, forgot (I don't have a MIPS toolchain to at least test build)

>> +attribute_hidden const char* __platform  = NULL;
> 
> Extra space before "= NULL".
> 
> NULL is not defined here.  I had to #include <stddef.h> to fix the build error.
> 

ok

>> +#define DL_PLATFORM_AUXV													   \
>> +	case AT_L1D_CACHESHAPE:													   \
>> +		__l1d_cache_shape = (int) av[AT_L1D_CACHESHAPE].a_un.a_val;			   \
>> +		break;																   \
>> +	case AT_PLATFORM:														   \
> 
> The '\' characters line up at column 80 if I use 4-space tabstops, but
> with standard 8-space tabs they're kind of all over the place...
> 

my choice is 4-space indeed.

> Is 4-space the standard for uClibc?  I did not see anything under
> docs/ which indicated either way.
> 

on this uClibc has a mixed style. On average I'd say that 4-space tabs
if the mostly common used... I've never seen 8-space tabs as kernel in
uClibc. I guess that 90% of the code will go over 80 columns if using
8-space tabs.

> MIPS:
> 
>> +attribute_hidden int __l1d_cache_shape = 0;
>> +attribute_hidden const char* __platform  = NULL;
> 
> SH:
> 
>> +static int __dcache_way_size;
> 
> Might want to make the initialization more consistent between the two
> architectures.
> 
For SH, __dcache_way_size is only needed to choice the proper value for
SHMLBA, (another patch will come once the common code has been
included), so there is no need to make it non static.

It will look like

"shm.h"
#define SHMLBA (__getshmlba())


"sh/dl-support.c"
/* Get the shmlba from the dcache way size */
#define way_size_to_shmlba(__way_size) \
 (((__way_size) > PAGE_SIZE) ? (__way_size) : PAGE_SIZE)

int __getshmlba() {
	return __shm_align;
}

(it needs to handle the case where the AT_L1D_CACHESHAPE is not passed
from the kernel)

For the MIPS, I don't know hot the cache_shape will be used. So my MIPS
code can be considered just a proposal. I rely upon MIPS user to arrange
it properly for their specific needs.

Thanks,
Carmelo